The present invention relates to the field of semiconductor manufacture and, more particularly, to a semiconductor device, e.g., a dynamic random access memory, incorporating an external electrical contact to a conductive layer, e.g., a cell plate of a capacitive storage cell, formed in the interior of the semiconductor device.
A dynamic random access memory (DRAM) chip is an example of a semiconductor device where reliable electrical contacts to an internal conductive layer must be provided. A DRAM chip is a rectangular array of individual circuits organized to store binary information through storage of different levels of voltage in a capacitive charge storage region of the DRAM chip. A transistor structure, including a plurality of transistors, is provided in the DRAM chip to provide access to the charge stored in each charge storage region. Each transistor functions as an on-off switch to open the communication lines between the charge storage region and a microprocessor in communication with the DRAM chip.
A network of electrically conductive cell plate contacts must be provided within the structure of the DRAM chip to enable storage of non-zero voltage levels in each charge storage region. Reliable storage is directly dependent upon the integrity of the cell plate contact. Accordingly, it is necessary to provide cell or top plate contacts characterized by low contact resistance.
Accordingly, there is a continuing need for semiconductor devices incorporating reliable electrical contacts to internal conductive layers.